, including all inherited members.
ADCAIN2MSB enum value | hw4::SltI2CCommandReg | |
ADCAIN3HighLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN3LowLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN3MSB enum value | hw4::SltI2CCommandReg | |
ADCAIN4HighLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN4LowLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN4MSB enum value | hw4::SltI2CCommandReg | |
ADCAIN5_8LSB enum value | hw4::SltI2CCommandReg | |
ADCAIN5HighLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN5LowLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN5MSB enum value | hw4::SltI2CCommandReg | |
ADCAIN6HighLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN6LowLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN6MSB enum value | hw4::SltI2CCommandReg | |
ADCAIN7HighLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN7LowLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN7MSB enum value | hw4::SltI2CCommandReg | |
ADCAIN8HighLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN8LowLimit enum value | hw4::SltI2CCommandReg | |
ADCAIN8MSB enum value | hw4::SltI2CCommandReg | |
ADCControlCfg1 enum value | hw4::SltI2CCommandReg | |
ADCControlCfg2 enum value | hw4::SltI2CCommandReg | |
ADCControlCfg3 enum value | hw4::SltI2CCommandReg | |
ADCExtTempAndAIN2_4LSB enum value | hw4::SltI2CCommandReg | |
ADCExtTempHighLimitLSB enum value | hw4::SltI2CCommandReg | |
ADCExtTempHighLimitMSB enum value | hw4::SltI2CCommandReg | |
ADCExtTempMSB enum value | hw4::SltI2CCommandReg | |
ADCExtTempOffset enum value | hw4::SltI2CCommandReg | |
ADCInterruptMask1 enum value | hw4::SltI2CCommandReg | |
ADCInterruptMask2 enum value | hw4::SltI2CCommandReg | |
ADCInterruptStatus1 enum value | hw4::SltI2CCommandReg | |
ADCInterruptStatus2 enum value | hw4::SltI2CCommandReg | |
ADCIntTempAndVDDLSB enum value | hw4::SltI2CCommandReg | |
ADCIntTempHighLimitLSB enum value | hw4::SltI2CCommandReg | |
ADCIntTempHighLimitMSB enum value | hw4::SltI2CCommandReg | |
ADCIntTempMSB enum value | hw4::SltI2CCommandReg | |
ADCIntTempOffset enum value | hw4::SltI2CCommandReg | |
ADCVDDHighLimitLSB enum value | hw4::SltI2CCommandReg | |
ADCVDDHighLimitMSB enum value | hw4::SltI2CCommandReg | |
ADCVDDMSB enum value | hw4::SltI2CCommandReg | |
addr | hw4::BaseRegister | [protected] |
addrShift | hw4::BaseRegister | [protected] |
BaseRegister(const char *name, int slotID, unsigned int regID, int r, int w, int len=1, int addrShift=0, int blockLen=1, bool useCache=true) | hw4::BaseRegister | |
blockLen | hw4::BaseRegister | [protected] |
busy | hw4::SltI2CCommandReg | |
cache | hw4::BaseRegister | [protected] |
checkIR() | Pbus | |
clearBlock(unsigned long addr, unsigned long data, unsigned long n, unsigned long incr=1) | Pbus | |
command | hw4::SltI2CCommandReg | |
cont() | Pbus | |
data | hw4::SltI2CCommandReg | |
debugMsg(const char *msg,...) | Pbus | [static] |
displayVersion(FILE *fout) | Pbus | |
error | hw4::SltI2CCommandReg | |
fltVersion | Pbus | [static] |
free(int host=0) | Pbus | [static] |
get(std::string item, std::string *value) | Pbus | |
getActiveBits(int elem=0, unsigned long mask=0xffffffff) | hw4::BaseRegister | [virtual] |
getAddr() | hw4::BaseRegister | |
getAddrShift() | hw4::BaseRegister | |
getBlockLength() | hw4::BaseRegister | |
getCache(int elem=0, int line=0) | hw4::BaseRegister | |
getCache(unsigned long *data) | hw4::BaseRegister | |
getIRorigin(unsigned long irvector) | Pbus | |
getIRvector() | Pbus | |
getLength() | hw4::BaseRegister | [virtual] |
getMode() | Pbus | |
getModeId() | Pbus | |
getName() | hw4::BaseRegister | |
getNTelescopes() | Pbus | [static] |
getPbusVersion() | Pbus | |
getState() | Pbus | |
getState(unsigned long addr) | Pbus | |
getTelescope() | Pbus | [static] |
getVersion() | Pbus | |
hasCBWOBits | hw4::BaseRegister | [protected] |
I2CCommand enum name | hw4::SltI2CCommandReg | |
init(const char *inifile="FE.ini", int host=0) | Pbus | [static] |
isAvailable() | Pbus | [static] |
isCacheEnabled() | hw4::BaseRegister | |
isConnected(int id=0) | Pbus | [static] |
isMemory | hw4::BaseRegister | [protected] |
isReadable() | hw4::BaseRegister | |
isWriteable() | hw4::BaseRegister | |
itemList | hw4::BaseRegister | |
itemN | hw4::BaseRegister | |
len | hw4::BaseRegister | [protected] |
name | hw4::BaseRegister | [protected] |
PCAEEPRegister enum value | hw4::SltI2CCommandReg | |
PCAEEPROMOffset enum value | hw4::SltI2CCommandReg | |
PCAInputPort enum value | hw4::SltI2CCommandReg | |
PCAIOConfiguration enum value | hw4::SltI2CCommandReg | |
PCAMuxControl enum value | hw4::SltI2CCommandReg | |
PCAMuxInputs enum value | hw4::SltI2CCommandReg | |
PCAOutputPort enum value | hw4::SltI2CCommandReg | |
PCAPolarityInversion enum value | hw4::SltI2CCommandReg | |
pImp | Pbus | [static] |
read() | hw4::BaseRegister | [virtual] |
read(int elem) | hw4::BaseRegister | [virtual] |
read(int elem, int line) | hw4::BaseRegister | [virtual] |
Pbus::read(unsigned long addr) | Pbus | |
readable | hw4::BaseRegister | [protected] |
readBlock(unsigned long *data) | hw4::BaseRegister | [virtual] |
readBlock(unsigned long *data, unsigned long blockLen) | hw4::BaseRegister | [virtual] |
readBlock(unsigned long *data, unsigned long start, unsigned long blockLen) | hw4::BaseRegister | [virtual] |
readBlock(int elem, unsigned long *data) | hw4::BaseRegister | [virtual] |
readBlock(int elem, unsigned long *data, unsigned long blockLen) | hw4::BaseRegister | [virtual] |
readBlock(int elem, unsigned long *data, unsigned long start, unsigned long blockLen) | hw4::BaseRegister | [virtual] |
Pbus::readBlock(unsigned long addr, unsigned long *data, unsigned long n, unsigned long incr=1) | Pbus | |
readElements(int elem0, int elem1, unsigned long *data) | hw4::BaseRegister | [virtual] |
readElements(unsigned long *data=0) | hw4::BaseRegister | [virtual] |
readRegisterBlock(unsigned long addr, unsigned long *data, unsigned long nPix, unsigned long incrPix, unsigned long nSlots=0, unsigned long incrSlots=0) | Pbus | |
reset() | Pbus | |
selectTelescope(int id) | Pbus | [static] |
set(std::string item, std::string value) | Pbus | |
setBitsToHigh(unsigned long mask) | hw4::BaseRegister | [virtual] |
setBitsToHigh(int elem, unsigned long mask) | hw4::BaseRegister | [virtual] |
Pbus::setBitsToHigh(unsigned long addr, unsigned long mask) | Pbus | |
setBitsToLow(unsigned long mask) | hw4::BaseRegister | [virtual] |
setBitsToLow(int elem, unsigned long mask) | hw4::BaseRegister | [virtual] |
Pbus::setBitsToLow(unsigned long addr, unsigned long mask) | Pbus | |
setCache(unsigned long data) | hw4::BaseRegister | |
setCache(int elem, unsigned long data) | hw4::BaseRegister | |
setCacheBits(unsigned long data, unsigned long mask, int shift) | hw4::BaseRegister | [virtual] |
setCacheBits(int elem, unsigned long data, unsigned long mask, int shift) | hw4::BaseRegister | [virtual] |
setDebugLevel(int level) | Pbus | [static] |
simReadIRvector() | Pbus | |
simWriteIRvector(unsigned long vector) | Pbus | |
SltI2CCommandReg(const char *name, int slotID, int regID, int r, int w) | hw4::SltI2CCommandReg | |
sltVersion | Pbus | [static] |
stop() | Pbus | |
useCache | hw4::BaseRegister | [protected] |
waitForIR(int timeout=0) | Pbus | |
write(unsigned long data) | hw4::BaseRegister | [virtual] |
write(int elem, unsigned long data) | hw4::BaseRegister | [virtual] |
write(int elem, int line, unsigned long data) | hw4::BaseRegister | [virtual] |
write(unsigned long *data) | hw4::BaseRegister | [virtual] |
Pbus::write(unsigned long addr, unsigned long data) | Pbus | |
writeable | hw4::BaseRegister | [protected] |
writeBits(unsigned long data, unsigned long mask, int shift) | hw4::BaseRegister | [virtual] |
writeBits(int elem, unsigned long data, unsigned long mask, int shift) | hw4::BaseRegister | [virtual] |
writeBits(int elem, int line, unsigned long data, unsigned long mask, int shift) | hw4::BaseRegister | [virtual] |
Pbus::writeBits(unsigned long addr, unsigned long data, unsigned long mask, int shift) | Pbus | |
writeBitsByName(char *name, unsigned long data) | hw4::BaseRegister | [virtual] |
writeBlock(unsigned long addr, unsigned long *data, unsigned long n, unsigned long incr=1) | Pbus | |
writeCache() | hw4::BaseRegister | [virtual] |
writeCache(int elem) | hw4::BaseRegister | [virtual] |
writeCache(int elem, int line) | hw4::BaseRegister | [virtual] |
writeRead | hw4::SltI2CCommandReg | |
~BaseRegister() | hw4::BaseRegister | [virtual] |
~SltI2CCommandReg() | hw4::SltI2CCommandReg | |