hw4::FltHitrateMargins Member List

This is the complete list of members for hw4::FltHitrateMargins, including all inherited members.

addr	hw4::BaseRegister	[protected]
addrShift	hw4::BaseRegister	[protected]
BaseRegister(const char *name, int slotID, unsigned int regID, int r, int w, int len=1, int addrShift=0, int blockLen=1, bool useCache=true)	hw4::BaseRegister
blockLen	hw4::BaseRegister	[protected]
cache	hw4::BaseRegister	[protected]
checkIR()	Pbus
clearBlock(unsigned long addr, unsigned long data, unsigned long n, unsigned long incr=1)	Pbus
cont()	Pbus
debugMsg(const char *msg,...)	Pbus	[static]
displayVersion(FILE *fout)	Pbus
FltHitrateMargins(const char *name, int slotID, int regID, int r, int w)	hw4::FltHitrateMargins
fltVersion	Pbus	[static]
free(int host=0)	Pbus	[static]
get(int *marginLLL, int *marginLL, int *marginL, int *marginH, int *marginHH, int *marginHHH)	hw4::FltHitrateMargins
hw4::BaseRegister::get(std::string item, std::string *value)	Pbus
getActiveBits(int elem=0, unsigned long mask=0xffffffff)	hw4::BaseRegister	[virtual]
getAddr()	hw4::BaseRegister
getAddrShift()	hw4::BaseRegister
getBlockLength()	hw4::BaseRegister
getCache(int elem=0, int line=0)	hw4::BaseRegister
getCache(unsigned long *data)	hw4::BaseRegister
getHigh(int *marginH, int *marginHH, int *marginHHH)	hw4::FltHitrateMargins
getIRorigin(unsigned long irvector)	Pbus
getIRvector()	Pbus
getLength()	hw4::BaseRegister	[virtual]
getLow(int *marginL, int *marginLL, int *marginLLL)	hw4::FltHitrateMargins
getMode()	Pbus
getModeId()	Pbus
getName()	hw4::BaseRegister
getNTelescopes()	Pbus	[static]
getPbusVersion()	Pbus
getState()	Pbus
getState(unsigned long addr)	Pbus
getTelescope()	Pbus	[static]
getVersion()	Pbus
H	hw4::FltHitrateMargins
hasCBWOBits	hw4::BaseRegister	[protected]
HH	hw4::FltHitrateMargins
HHH	hw4::FltHitrateMargins
high	hw4::FltHitrateMargins
init(const char *inifile="FE.ini", int host=0)	Pbus	[static]
isAvailable()	Pbus	[static]
isCacheEnabled()	hw4::BaseRegister
isConnected(int id=0)	Pbus	[static]
isMemory	hw4::BaseRegister	[protected]
isReadable()	hw4::BaseRegister
isWriteable()	hw4::BaseRegister
itemList	hw4::BaseRegister
itemN	hw4::BaseRegister
L	hw4::FltHitrateMargins
len	hw4::BaseRegister	[protected]
LL	hw4::FltHitrateMargins
LLL	hw4::FltHitrateMargins
low	hw4::FltHitrateMargins
name	hw4::BaseRegister	[protected]
pImp	Pbus	[static]
read()	hw4::BaseRegister	[virtual]
read(int elem)	hw4::BaseRegister	[virtual]
read(int elem, int line)	hw4::BaseRegister	[virtual]
Pbus::read(unsigned long addr)	Pbus
readable	hw4::BaseRegister	[protected]
readBlock(unsigned long *data)	hw4::BaseRegister	[virtual]
readBlock(unsigned long *data, unsigned long blockLen)	hw4::BaseRegister	[virtual]
readBlock(unsigned long *data, unsigned long start, unsigned long blockLen)	hw4::BaseRegister	[virtual]
readBlock(int elem, unsigned long *data)	hw4::BaseRegister	[virtual]
readBlock(int elem, unsigned long *data, unsigned long blockLen)	hw4::BaseRegister	[virtual]
readBlock(int elem, unsigned long *data, unsigned long start, unsigned long blockLen)	hw4::BaseRegister	[virtual]
Pbus::readBlock(unsigned long addr, unsigned long *data, unsigned long n, unsigned long incr=1)	Pbus
readElements(int elem0, int elem1, unsigned long *data)	hw4::BaseRegister	[virtual]
readElements(unsigned long *data=0)	hw4::BaseRegister	[virtual]
readRegisterBlock(unsigned long addr, unsigned long *data, unsigned long nPix, unsigned long incrPix, unsigned long nSlots=0, unsigned long incrSlots=0)	Pbus
reset()	Pbus
selectTelescope(int id)	Pbus	[static]
set(int marginLLL, int marginLL, int marginL, int marginH, int marginHH, int marginHHH)	hw4::FltHitrateMargins
hw4::BaseRegister::set(std::string item, std::string value)	Pbus
setBitsToHigh(unsigned long mask)	hw4::BaseRegister	[virtual]
setBitsToHigh(int elem, unsigned long mask)	hw4::BaseRegister	[virtual]
Pbus::setBitsToHigh(unsigned long addr, unsigned long mask)	Pbus
setBitsToLow(unsigned long mask)	hw4::BaseRegister	[virtual]
setBitsToLow(int elem, unsigned long mask)	hw4::BaseRegister	[virtual]
Pbus::setBitsToLow(unsigned long addr, unsigned long mask)	Pbus
setCache(unsigned long data)	hw4::BaseRegister
setCache(int elem, unsigned long data)	hw4::BaseRegister
setCacheBits(unsigned long data, unsigned long mask, int shift)	hw4::BaseRegister	[virtual]
setCacheBits(int elem, unsigned long data, unsigned long mask, int shift)	hw4::BaseRegister	[virtual]
setDebugLevel(int level)	Pbus	[static]
setHigh(int marginH, int marginHH, int marginHHH)	hw4::FltHitrateMargins
setLow(int marginL, int marginLL, int marginLLL)	hw4::FltHitrateMargins
simReadIRvector()	Pbus
simWriteIRvector(unsigned long vector)	Pbus
sltVersion	Pbus	[static]
stop()	Pbus
useCache	hw4::BaseRegister	[protected]
waitForIR(int timeout=0)	Pbus
write(unsigned long data)	hw4::BaseRegister	[virtual]
write(int elem, unsigned long data)	hw4::BaseRegister	[virtual]
write(int elem, int line, unsigned long data)	hw4::BaseRegister	[virtual]
write(unsigned long *data)	hw4::BaseRegister	[virtual]
Pbus::write(unsigned long addr, unsigned long data)	Pbus
writeable	hw4::BaseRegister	[protected]
writeBits(unsigned long data, unsigned long mask, int shift)	hw4::BaseRegister	[virtual]
writeBits(int elem, unsigned long data, unsigned long mask, int shift)	hw4::BaseRegister	[virtual]
writeBits(int elem, int line, unsigned long data, unsigned long mask, int shift)	hw4::BaseRegister	[virtual]
Pbus::writeBits(unsigned long addr, unsigned long data, unsigned long mask, int shift)	Pbus
writeBitsByName(char *name, unsigned long data)	hw4::BaseRegister	[virtual]
writeBlock(unsigned long addr, unsigned long *data, unsigned long n, unsigned long incr=1)	Pbus
writeCache()	hw4::BaseRegister	[virtual]
writeCache(int elem)	hw4::BaseRegister	[virtual]
writeCache(int elem, int line)	hw4::BaseRegister	[virtual]
~BaseRegister()	hw4::BaseRegister	[virtual]
~FltHitrateMargins()	hw4::FltHitrateMargins