fdhwlib
2.0.25
|
00001 /*************************************************************************** 00002 SltDef.h - description 00003 00004 begin : Tue Jul 18 2000 00005 copyright : (C) 2000 by Andreas Kopmann 00006 email : kopmann@hpe.fzk.de 00007 ***************************************************************************/ 00008 00009 #ifndef SLTDEF_H 00010 #define SLTDEF_H 00011 00012 // USCT 00013 #ifdef USCT 00014 #define SLT_VER 110 00015 #endif 00016 00017 #ifndef SLT_VER 00018 // Version of the SLT description 00019 // 1.00 First version 00020 //#define SLT_VER 100 00021 // 1.10 Minor modification effecting the control register 00022 // Released 7.6.01 ak 00023 //#define SLT_VER 110 00024 // 3.00 Changes for Hardware version 3 00025 // Numbering of the slots changed 00026 // Memory doubled 00027 //#define SLT_VER 300 00028 // 3.10 New: veto time counters and 00029 // the trigger time stamp information changed 00030 #define SLT_VER 310 00031 #endif 00032 00033 00034 // Version number of the slt implementation 00035 00036 // AM to Versions 3.11 to 3.13 00037 // I downloaded today new slt revision with number 0x1c in Co. 00038 // In the previous two revisions I implemented 00039 // in the control register bit 16. This bit I used during my 00040 // tests of the single phe measurements (this bit when '1' masks 00041 // external inhibit). To avoid any possible troubles during 00042 // DAQ tests I cancelled this bit. It still can be written and 00043 // read back but it has no influence on the slt behaviour. 00044 00045 00046 #define SLT_HW_VER35 0x23 // ??? 00047 #define SLT_HW_VER34 0x22 // ??? 00048 #define SLT_HW_VER318 0x21 // Mar 2006 no reset release after startup required (for FLTs) 00049 #define SLT_HW_VER317 0x20 // Mar 2005 changes/ fixes of dead/veto counter?! 00050 #define SLT_HW_VER316 0x1f // Oct 2004, Bug fixes in page controller 00051 // Changed order of dead time counters 00052 // Status of setpagefree: reading register will give 00053 // 1 if still running, 0 if ready...(?) 00054 #define SLT_HW_VER315 0x1e // Mar 2004, Improved timing in Slt-FPGA design 00055 // Fixed problems: Disfunction after burn-in tests 00056 // Second strobe not recocnised after a while 00057 #define SLT_HW_VER314 0x1d // ??? 00058 #define SLT_HW_VER313 0x1c // Feb 2004, Ext Inhibit Mask disabled again 00059 #define SLT_HW_VER312 0x1b // Nov 2003 00060 #define SLT_HW_VER311 0x1a 00061 #define SLT_HW_VER310 0x19 00062 00063 #define SLT_HW_VER300 0x18 00064 #define SLT_HW_VER110 0x02 // ??? 00065 #define SLT_HW_VER100 0x00 00066 00067 // Define for which version the library can be used 00068 // Give min and max value that is compatible 00069 00070 #if defined (SLT_VER) && (SLT_VER >= 310) 00071 #define SLT_HW_VER SLT_HW_VER310 00072 #define SLT_HW_VER_MAX SLT_HW_VER35 00073 00074 #else 00075 #if defined (SLT_VER) && (SLT_VER >= 300) 00076 #define SLT_HW_VER SLT_HW_VER300 00077 #define SLT_HW_VER_MAX SLT_HW_VER300 00078 00079 #else 00080 #if defined (SLT_VER) && (SLT_VER >= 110) 00081 #define SLT_HW_VER SLT_HW_VER110 00082 #define SLT_HW_VER_MAX SLT_HW_VER110 00083 00084 #else 00085 #if defined (SLT_VER) && (SLT_VER >= 100) 00086 #define SLT_HW_VER SLT_HW_VER100 00087 #define SLT_HW_VER_MAX SLT_HW_VER100 00088 00089 00090 #endif 00091 #endif 00092 #endif 00093 #endif 00094 00095 00096 // Number of memory pages 00097 #if defined (SLT_VER) && (SLT_VER >= 300) 00098 #define SLT_PAGES 64 00099 #else 00100 #define SLT_PAGES 32 00101 #endif 00102 00103 00104 // Flags of the IR mask 00105 //#define SLT_IRMASK_NXPG 0x01 00106 //#define SLT_IRMASK_PG_ERR 0x02 00107 //#define SLT_IRMASK_FLT_CONF_ERR 0x04 00108 //#define SLT_IRMASK_CONF_ERR 0x08 00109 //#define SLT_IRMASK_SLOW_CNTRL_ERR 0x10 00110 00111 //#define SLT_IRMASK_C_SYNC_ERR 0x20 00112 //#define SLT_IRMASK_T_SYNC_ERR 0x40 00113 //#define SLT_IRMASK_SYNC_ERR 0x60 00114 00115 00116 /* Mask for the IR controller on the Slt board: 00117 * The interrupt "NextPage" is generated if a next page 00118 * signal occures. 00119 */ 00120 #define SLT_IRMASK_NXPG 0x0001 00121 00122 /* Mask for the IR controller on the Slt board: 00123 * The interrupt "Warning AllPagesFull" is 00124 * generated if the actual page 00125 * pointer is set to the last free page. The 00126 * next trigger will stop the data aquisition. 00127 */ 00128 #define SLT_IRMASK_WAR_PGFULL 0x0002 00129 00130 /* Mask for the IR controller on the Slt board: 00131 * The interrupt "Error Loading Flt FPGAs" 00132 * is generated if an error 00133 * occures while the configuration of the 00134 * FPGAs on the Flt boards. 00135 */ 00136 #define SLT_IRMASK_ERR_FLT 0x0004 00137 00138 /* Mask for the IR controller on the Slt board: 00139 * The interrupt "Error Configuration" 00140 * is generated if the command 00141 * configure FPGAs is given on a system without 00142 * an confuration error?! 00143 */ 00144 #define SLT_IRMASK_ERR_CONF 0x0008 00145 00146 /* Mask for the IR controller on the Slt board: 00147 * The interrupt "Error Sensor OutOfRange" is generated if one 00148 * of the sensors leaves the allowed range. 00149 */ 00150 #define SLT_IRMASK_ERR_SC 0x0010 00151 00152 /* ? 00153 */ 00154 #define SLT_IRMASK_ERR_CFPGA 0x0020 00155 /* ? 00156 */ 00157 #define SLT_IRMASK_ERR_TFPGA 0x0040 00158 00159 00160 /* Mask for the IR controller on the Slt board: 00161 * The interrupt "Error PageFull" is generated if all pages 00162 * are full. The data aquisition has been stopped 00163 * in this case and needs to be restarted 00164 * manually after some pages have been cleared. 00165 */ 00166 #define SLT_IRMASK_ERR_PGFULL 0x0080 00167 00168 /* Mask for the IR controller on the Slt board: 00169 * The interrupt "PageLost" is generated if an next 00170 * page occures before an acknowledge for 00171 * last occurence of the trigger has been received. 00172 * If this warning occures, it is necessary 00173 * to analyse the page status register for 00174 * the filled pages. At least one page number will not 00175 * be returned with the acknoledge vector. 00176 */ 00177 #define SLT_IRMASK_WAR_PGLOST 0x0100 00178 00179 00180 /* Mask for the IR controller on the Slt board: 00181 * An interrupt is generated if at least one 00182 * of the two FPGA errors occure. 00183 * In both cases the synchronisation with the 00184 * second strobe signal failed. 00185 * This mask includes Error CFPGA Sync and 00186 * Error TFPGA Sync 00187 */ 00188 #define SLT_IRMASK_ERR_SYNC 0x0060 00189 00190 00191 /* Mask for the IR controller on the Slt board: 00192 * An interrupt is generated if any of 00193 * the page controller interrupts is generated. 00194 * This mask includes "NextPage", "Warning AllPagesFull", 00195 * "Error AllPagesFull" and "Warning PageLost". 00196 * 00197 */ 00198 #define SLT_IRMASK_PGCTRL 0x0183 00199 00200 00203 #if defined (SLT_VER) && (SLT_VER >= 110) 00204 // Version 1.10 00205 # define SLT_TRIGGER_SW 0x01 // Software 00206 # define SLT_TRIGGER_I_N 0x07 // Internal + Neighbors 00207 # define SLT_TRIGGER_LEFT 0x04 // left neighbor 00208 # define SLT_TRIGGER_RIGHT 0x02 // right neighbor 00209 # define SLT_TRIGGER_INT 0x08 // Internal 00210 # define SLT_TRIGGER_EXT 0x10 // External 00211 #endif 00212 00213 00214 #endif