fdhwlib
2.0.25
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00001 /*************************************************************************** 00002 FltDef.h - description 00003 00004 begin : Tue Jul 18 2000 00005 copyright : (C) 2000 by Andreas Kopmann 00006 email : kopmann@hpe.fzk.de 00007 ***************************************************************************/ 00008 00009 #ifndef FLTDEF_H 00010 #define FLTDEF_H 00011 00012 // USCT 00013 #ifdef USCT 00014 #define FLT_VER 220 00015 #endif 00016 00017 #ifndef FLT_VER 00018 // Version of the FLT description 00019 // 1.00 First version with 4bit register address 00020 //#define FLT_VER 100 00021 // 2.00 Extended register address (6bit) 00022 //#define FLT_VER 200 00023 // 2.10 Modification in Hitrate control, PeriphStatus and Stat. Functions 00024 //#define FLT_VER 210 00025 // 2.20 Modifications of the statistics 00026 //#define FLT_VER 220 00027 // 3.00 Increased ADC Memmory -> Address scheme shifted 00028 #define FLT_VER 300 00029 #endif 00030 00031 // Adress modell 00032 #if defined (FLT_VER) && (FLT_VER >= 300) // Version 3 00033 #define FLT_ADDRSP 21 // Address Space Switch bits 22..21 (shortend!) 00034 #define FLT_CHADDR 16 // Channel Address bits 20..16 00035 #define FLT_PAGENR 10 // Page Number bits 14..10 00036 #define FLT_REGID 0 // Register Id bits 14.. 0 00037 00038 #define FLT_SLOTID_ALL 0x1f // broadcast to all FLT boards 00039 #define FLT_CHADDR_ALL 0x1f // broadcast to all Channels 00040 00041 #define SELECT_ALL_SLOTS ((0x1F <<24) + (0x1F <<16)) 00042 #define SELECT_ALL_CHANNELS ( 0x1F <<16) 00043 00044 00045 #else 00046 #if defined (FLT_VER) && (FLT_VER >= 200) // Version 2 00047 #define FLT_ADDRSP 20 // Address Space Switch bits 23..20 00048 #define FLT_CHADDR 15 // Channel Address bits 19..15 00049 #define FLT_PAGENR 10 // Page Number bits 14..10 00050 #define FLT_REGID 0 // Register Id bits 14.. 0 00051 00052 #define FLT_SLOTID_ALL 0x1f // broadcast to all FLT boards 00053 #define FLT_CHADDR_ALL 0x1f // broadcast to all Channels 00054 00055 #define SELECT_ALL_SLOTS ((0x1F <<24) + (0x1F <<15)) 00056 #define SELECT_ALL_CHANNELS ( 0x1F <<15) 00057 00058 #else // Version 1 00059 #define FLT_CHADDR 19 // Channel Addres bits 23..19 00060 #define FLT_REGID 15 // Register Id bits 18..15 00061 #define FLT_PAGENR 10 // Page Number bits 14..10 00062 00063 #define SELECT_ALL_SLOTS ((0x1F <<24) + (0x1F <<19)) 00064 #define SELECT_ALL_CHANNELS ( 0x1F <<19) 00065 #endif 00066 #endif 00067 00069 #define FLT_CHANNELS 22 00070 00072 #define FLT_PAGE_SIZE 1000 00073 00075 #if defined (FLT_VER) && (FLT_VER >= 300) // Version 3 00076 #define FLT_PAGES 64 00077 #else 00078 #define FLT_PAGES 32 00079 #endif 00080 00081 00082 // Flags of the IR mask 00083 #define FLT_IRMASK_P1_SYNC_ERR 0x01 00084 #define FLT_IRMASK_P2_SYNC_ERR 0x02 00085 #define FLT_IRMASK_P3_SYNC_ERR 0x04 00086 #define FLT_IRMASK_P4_SYNC_ERR 0x08 00087 #define FLT_IRMASK_SYNC_ERR 0x0f 00088 00089 #define FLT_IRMASK_THRESH_OTR 0x10 00090 #define FLT_IRMASK_HITRATE_ERR 0x20 00091 #define FLT_IRMASK_GAIN_ERR 0x80 00092 00093 00094 #endif 00095